As the scale of complexity provided by integrated circuits (ICs) and related systems increases, the number of functional units included on a single die may be increased because each circuit consumes comparatively less space than before. One result of this trend is that ICs, such as processors, that have traditionally been completely digital are increasingly including analog components, such as analog-to-digital (A/D) converters, digital-to-analog (D/A) converters and phased locked loop (PLL) circuits. These ICs having both analog and digital components are known as mixed signal, or analog mixed-signal (AMS) ICs.
Because processors and other complex circuits are expensive to fabricate, designs are typically thoroughly simulated with software simulation languages such as HDL (Hardware Description Language) and VHDL (VHSIC Hardware Description Language, where VHSIC denotes "Very High Speed Integrated Circuit"). VHDL is described in greater detail in "IEEE Standard VHDL Language Reference Manual," ANSI Std. 1076-1993, Published Jun. 6, 1994. These simulation programs provide simulation and debugging for digital components. However, they do not provide simulation of analog or mixed-signal components. For this reason, designers were required to simulate analog components with simulation software such as SPICE that provide analog circuit simulation. Analog simulation, however, typically requires a much lower level of programming than digital simulation.
In order to expedite simulation of mixed-signal designs, mixed-signal extensions to HDL (HDL-A.TM.), VHDL (VHDL-AMS), and Verilog-A (Verilog-AMS) have been designed. VHDL-AMS is described in greater detail in 1076.1 Language Design Committee, several papers under the generic name "White Papers", IEEE 1076.1 Internal work, 1996 and "1076.1 Working Document: Definition of Analog Extensions to IEEE Standard VHDL", IEEE 1076.1 Committee Internal work, Jul., 1997. These extensions provide circuit designers with a single software tool to simulate mixed signal designs. Because these unified simulation programs are extensions to previous digital simulation programs, the digital portion of the programs are largely unchanged.
The analog simulation provided by mixed-signal simulation programs typically model the analog systems using differential and algebraic equations (DAEs), including Kirchoffs Current Law (KCL) and Kirchoffs Voltage Law (KVL), which describe the interconnection of circuit elements. Because the mathematical model of analog circuits include a large number of non-linear differential equations, simulations are time consuming, even with high-speed computer systems. Simplifications, such as One Step Relaxation (OSR), Newton-Raphson Method (NRM) and Integral Equation Method (IEM) have been used. However, each requires solving sets of equations until convergence.
During simulation, the designer must wait until convergence or until a predetermined time period has elapsed to determine whether the DAEs describing the circuit converge. A need exists therefore, to provide the designer with graphical feedback during the solution of the DAEs or other equations so that he or she may monitor whether convergence occurs and at what rate convergence occurs.